GLX 1.0 is out and that means... HOLIDAY!!!

yep it's incredible, but it's here

the rewritten, quick and "dual core" DLX processor has finally reached the world!
ok it's not really dual core, but there are two execution paths, implementig the Very Long Instruction Word support.

For this processor a full physical design has been carried out, which you can find in the source archive.


Now that this processor has been completed, it's finally time for some holiday!!!
No more school untill september! yay!

Vittorio

3k-cc BETA 1 released

After almost a month of waiting, it is finally here!
the compiler for the GLE-MiPS family of custom processor!!!! download here!

it is written in Java using JFlex and CUP and it is released as a beta as there might be some akward unexpected condition (have mercy, it was done writing at 6,30 in the morning!)

you know the site
http://gle-mips.googlecode.com

GLE-MiPS 1.2 - with Pentium4 Technology

A new version of your favourite process has been released today!
The main news is that the adder is now implemented with a Sparse Tree Adder scheme, the same one found in Pentium4 cpus

subsequently all the modules that used an adder (like the multiplier) have been optimized, while simpler modules that didn't need such a complicated device retained their ripple-carry-adder scheme.

Here is the changelog:

• adder now uses a Sparse Tree adder scheme
• testbench included by default
• ROM revisions
• optimizations for modules using adders

You can download the source code here

http://gle-mips.googlecode.com/
Vittorio

QUATTRO 1.0 is out!

And here we have QUATTRO
a new microprocessor design for small embedded systems!

With only 4 bit data, it features a shunk down instruction set of GLE-MiPS 1.1 (from which all the code derived)
with such small amount of speed we can gather a nice 120 MHz processor, big only a few transistors (synthesizes completely on a Spartan 3)

You can grab the code here
and visit the renewed version of the site

http://gle-mips.googlecode.com/

Expect some lines for documentation soon :)
Vittorio

GLE-MiPS 1.1

First revision of the stable release! some improvements here and there but the central update is for the multiplier which now explicitly uses the Booth Algorithm

here is the source and the changelog

• multiplier uses explicitly the booth algorithm
• control unit revision
• instruction decode and main architecture cleanup
• register and multiplexer coding reviewed
• bugfix in the comparator

http://gle-mips.googlecode.com/

Vittorio

GLE-MiPS stable and lots of documents!!!

And we finally got it to the STABLE!!!
this project has been already awarded with a fantastic 30/30 mark (equivalent to an A)!!!

grab it here!

and if you are looking for documentation, we have two options:
either the wiki page at googlecode's
or the scribd pubblication

in any case, i hope you find it useful :)


while on the subject of cpu, i'm also posting a report of an (unsuccessuful) project of testing the cache in OpenSPARC T1 processor; it proved quite too hard for us and so we had to stop at a certain degree
however it might be useful for people involved in research like this
http://www.scribd.com/doc/3494208/Testing-of-the-Cache-Memory-in-the-OpenSPARC-T1
written by Matteo Ainardi, Matteo Bosio, Salvatore Campione, Vittorio Giovara and Alberto Grand

while speaking of documents, i also found out why some documents in Scribd were seen just as like they were printed by Gutenberg himself! It's all cause of the T1 font encoding, that even if may result more pleasant in file version, caused several glitches with the online view! Now all the affected documents (basically this one, this and this) are corrected

GLE-MiPS - second beta beta!

and we made it to the second beta!
Just after a couple of days we've managed to add

• 64 bits extension
• integer modulo/division
• data cache implementation

I must point out that the 64-bit extension is partial, because it is just an addon to the current 32bits architecture; so for now it is useful only for working on 64bits numbers and nothing else.
For the data cache there is a very strict size constrain as it requires several thousands of flip flops and most synthetisors can't handle such big numbers.

So, if you want to take a peek at the source, grab it here!

GLE-MiPS - reaching beta!

hi all!
I'm pleased to announce that the project has reached the BETA status!
It should work as the blueprints says, but i need to thoroghly test it!

if you want to check it out it's here.

the good news now is that there are many fellow students who like this project and are quite willing to help!
Moreover we're forming a group for building a compiler of an Assembly-like language for this processor! So it appears that the project might be something successful in the end...

let's hope so
Vittorio

Second Project: GLE-MiPS

Well, it's time to start another project, this time a little more serious!

we have to design a fully working MIPS-like processor!
After weeks of hard work finally we arrive to a very alpha stage... that means one thing: publishing!!! it's OpenSource obviously!

so i set up a google code account and stasted svnning! if you litterally check out, do

svn checkout http://gle-mips.googlecode.com/svn/trunk/ gle-mips

if you want to browse the source (and help me find bugs btw :D) you can have a look here!

http://gle-mips.googlecode.com

be careful that this is still very alpha, and not ready for submission anywhere; the single modules work, but the whole processor needs to be tested (heavily tested i might say)

that's all for now!
Vittorio